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Clock Divider, ÷4, 10 GHz, 1.8 V / 2.5 V, with CML Outputs

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Overview

The NB7V33M is a differential divide by 4 Clock divider with asynchronous reset. The differential Clock inputs incorporate internal 50-ohm termination resistors and will accept LVPECL, CML and LVDS logic levels. The NB7V33M produces a div 4 output copy of an input Clock operating up to 10GHz with minimal jitter. The Reset pin is asserted on the rising edge. Upon powerup, the internal flip-flops will attain a random state. The Reset allows for the synchronization of multiple NB7V33Ms in a system. The 16mA differential CML output provides matching internal 50-ohm termination which provides 400mV output swing when externally receiver terminated with 50-ohm to VCC. The NB7V33M is the div 4 version of the NB7V32M (div 2) and is offered in a low profile 3mm x 3mm 16-pin QFN package. The NB7V33M is a member of the GigaComm family of high performance clock products.

  • Clock Divider

  • ATE, Instrumentation

  • Maximum Input Clock Frequency > 10 GHz, typical
  • 260 ps Typical Propagation Delay
  • 35 ps Typical Rise and Fall Times
  • Differential CML Outputs, 400 mV peaktopeak, typical
  • Internal 50-ohm Input Termination Resistors
  • Random Clock Jitter < 0.8 ps RMS
  • 40C to +85C Ambient Operating Temperature

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Reference Price

NB7V33MMNG

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Active

CAD Model

Pb

A

H

P

QFN-16

1

260

TUBE

123

Y

Divider

LVDS

CML

2.5

11000

0.2

60

Price N/A

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NB7V33MMNHTBG

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Active

CAD Model

Pb

A

H

P

QFN-16

1

260

REEL

100

Y

Divider

LVDS

CML

2.5

11000

0.2

60

Price N/A

More Details

NB7V33MMNTXG

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Active

CAD Model

Pb

A

H

P

QFN-16

1

260

REEL

3000

Y

Divider

LVDS

CML

2.5

11000

0.2

60

Price N/A

More Details

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